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MITSUMI
System Reset (Built-in Watch Dog Timer) MM1099
System Reset (Built-in Watch Dog Timer)
Monolithic IC MM1099
Outline
The function of this IC series MM1099 is to accurately reset systems, a generating reset signal at the time of instantaneous supply voltage off or lowering in varied CPU and other logic system. Further, with the watch dog timer built-in it can diagnose the operation of the system, intermittently generating reset pulses when they operate erroneously to prevent runaway.
Features
1. 2. 3. 4. 5. Built-in watch dog timer Low current consumption 130A TYP. Low operating threshold voltage VCC=0.8V Watch dog stop function (RCT terminal) Long clock monitoring time TPR (POWER ON) : TWD (clock monitoring)=1 : 1 6. Fewer outer components
Package
DIP-8B (MM1099AD, MM1099BD) SOP-8C (MM1099AF, MM1099BF) SIP-8A (MM1099AS, MM1099BS)
Applications
1. Reset circuit for microcomputers, CPU and MPU. 2. Reset circuit for logic circuitry. 3. Monitoring of microcomputer system, etc.
Pin Assignmemt
1 2 3 8 7 6 5 4 5 1 2 3 4 6 7 SOP-8C/DIP-8B 8
TC N.C CK GND VCC RCT VS
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1 2 3 4 12345678 SIP-8A 5 6 7 8
TC N.C CK GND VCC RCT VS
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RESET
RESET
MITSUMI
System Reset (Built-in Watch Dog Timer) MM1099
Pin Description
Pin No. Pin name TC N.C CK GND VCC RCT VS RESET Clock input terminal Inputs the clock from the logic system. Ground terminal Voltage detection MM1099A 3.2V MM1099B 4.2V OPEN, Stop connect to GND Watchdog timer stop pin Operation modes: Operation Detect voltage variable terminal Reset output pin (low output) Variable terminals TWD, TWR and TPR The time for TWD, TWR and TPR to be determined by the external capacitor. 2 3 4 5 6 7 8 Function TPR (mS) = 5000 CT (F) TWD (mS) = 500 CT (F) TWR(mS) = 100 CT (F)
1
Absolute Maximum Ratings
Item Power supply voltage CK pin input voltage VS pin input voltage Voltage applied to RCT pin
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Symbol VCC max. VCK VVS VRCT VOH Pd TSTG
Rating -0.3~+10 -0.3~VCC+0.3 ( < +10) = -0.3~VCC+0.3 ( < +10) = -0.3~VCC+0.3 ( < +10) = -0.3~VCC+0.3 ( < +10) = 300 -40~+125
Units V V V V V mW
C
Voltage applied to RESET pin Allowable loss Storage temperature
Recommended Operating Conditions
Item Power supply voltage
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Symbol VCC IOL TWD tFC, tRC CT TOP
Rating +2.2~+7.0 0~1.0 0.1~1000 <100 0.0002~2 -25~+75
Units V mA mS S F
C
RESET sync current Clock monitoring time setting Clock rise and fall times TC pin capacitance Operating temperature
MITSUMI
System Reset (Built-in Watch Dog Timer) MM1099
Electrical Characteristics (DC)
Item Consumption current MM1099A MM1099B MM1099A Detection voltage MM1099B MM1099A MM1099B Detection voltage temperature coefficient Hysteresis voltage MM1099A MM1099B VSH
(Except where noted otherwise, MM1099A : VCC=3.6V, Ta=25C, MM1099B : VCC=5.0V) Measurement conditions During watchdog timer operation VS=OPEN, VCC VS=OPEN, VCC Min. Typ. Max. Units (100) (150) 130 195 3.10 3.20 3.30 4.05 4.20 4.35 3.15 3.25 3.35 4.15 4.30 4.45 0.01 VSH-VSL, VCC 25 50 0.8 A : VCK=3.6V, B : VCK=5.0V VCK=0V I RESET =-1A, VS=OPEN I RESET =0.5mA, VS=0V I RESET =1.0mA, VS=0V V RESET =1.0V, VS=0V
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Symbol ICC VSL
A
V
VS/ T VHYS VTH IIH IIL VOH VOL1 VOL2 IOL ICT1 ICT2
%/C 100 150 2 1 -2 mV V A V 0.4 0.5 V mA A A V
50 100 1.2 0 -6 3.4 4.5 0.2 0.3
CK input threshold CK input current Output voltage (High) MM1099A MM1099B
-12 3.0 4.0
Output voltage (Low) R output sync current CT charge current Minimum operating power supply voltage to ensure RESET
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1
2
VTC=1.0V during watchdog timer operation -0.16 -0.24 -0.48 VTC=1.0V during power ON reset operation -0.16 -0.24 -0.48 V RESET =0.4V I RESET =0.1mA
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VCCL
0.8
1.0
MITSUMI
System Reset (Built-in Watch Dog Timer) MM1099
Electrical Characteristics (AC)
Item MM1099A TPI MM1099B TCKW TCK TWD TWR TPR VCC CK Symbol VCC
(Except where noted otherwise, MM1096A : VCC=3.6V, Ta=25C MM1096B : VCC=5.0V) Min. 8 S 8 or 3 20 CT=0.02F CT=0.02F 50 1 50 100 2 100 2 2.0 0.2 150 3 150 10 4.0 1.0 S S mS mS mS S S S Typ. Max. Units
Measurement conditions 3.6V 2.8V 5.0V 4.0V
VCC input pulse width
CK input pulse width CK input cycle Watchdog timer monitoring time 1
*
Reset time for watchdog timer 2
*
Reset hold time for power supply rise 3
*
CT=0.02F, VCC
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Output delay time from VCC 4
*
TPD tR tF
RESET pin, RL=10k, CL=20pF
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Output rise time 5
* Output fall time 5 *
RESET pin, RL=10k, CL=20pF
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RESET pin, RL=10k, CL=20pF
Notes : 1 The "monitoring time" means the time interval from the last pulse of the clock pulses for timer clear (negative edge) to the output of the reset pulse. If the clock pulse is not input during this time interval, the reset output will be given. 2 The "reset time" is no other than the reset pulse width, except when resetting the POWER ON. 3 The "reset hold time" is the time interval from the time point when VCC exceeds the detect (VSH) at the time of Power On Reset (Power variation reset) to the reset release (RESET output "HIGH"). 4 The "output delay time" means the time interval from when the supply voltage comes lower than the detect voltage (VSL) to when comes the reset state (RESET output "Low"). 5 The voltage range is 10 to 90% when measuring the output rise and fall times. 6 By varying the capacitance of CT, we can vary the watch dog timer monitoring time (TWD), the reset time at the time of the watch dog timer (TWR), and the reset hold time at the time of power source rise (TPR). The variable time can be expressed by the following formulas: TPR (mS) . . 5000 CT (F) = TWD (mS) . . 5000 CT (F) = . 100 CT (F) TWR (mS) = . Example : When CT=0.02F . TPR = 100mS . TWD . . 100mS = TWR . . 2mS =
* * * * * *
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MITSUMI
System Reset (Built-in Watch Dog Timer) MM1099
Measuring Circuits
Measuring Circuit 1 (DC) Measuring Circuit 2 (AC)
Measuring Circuit 1
Item Consumption current Detection voltage CK input threshold CK input current Output voltage (High) Output voltage (Low) Output sink current CT charge current 1 CT charge current 2 Minimum operating power
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SW & Power Supply Table
VCC 3.6V 3.6V 3V 3V 3.6V 3.6V 3.6V 3.6V 3.6V 3.6V 3.6V 3.6V 3.6V 0V 2V VCK 3.6V 0V 0V 3.6V 0V 3.6V 3.6V 3.6V 3.6V 0V VCT 0V 2V 2V 1V 0V 0V 2V 2V 2V 2V 1V IV 0V I RESET -1A 0.5mA 1.0mA -----------------------------------------------
Symbol SW1 SW2 SW3 SW4 SW5 SW6 SW7 ICC VSL VSH VTH IIH IIL VOH VOL1 VOL2 IOL1 ITC1 ITC2 VCCL OFF OFF OFF OFF OFF OFF ON ON ON OFF OFF OFF ON OFF OFF OFF OFF OFF OFF OFF ON ON ON OFF OFF OFF OFF ON ON OFF OFF OFF ON ON ON ON OFF OFF ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON OFF OFF ON A A A A A A A A A B A A A
VM, IM ICC VO1, CRT1 VO1, CRT1 ICK, VCK ICK ICK VO1 VO1 VO1 IO1 ITC ITC VO1, VCC
Notes
3.6V 0V 3V
VO=1V
supply voltage to ensure RESET
Measuring Circuit 2
Item VCC input pulse width TP1 CK input pulse width TCKW CK input cycle Watchdog timer monitoring time Reset time for watchdog timer Reset hold time for power supply rise Output delay time from VCC Output rise time Output fall time TCK TWD TWR TPR TPD TR TF
SW & Power Supply Table
VCCA 3.6V 2.8V 3.6V 0V T1 VCC 3.6V 3.6V 3.6V 3.6V 3.6V 3.6V 3.6V 1.4V 0V 1.4V 0V 1.4V 0V T2 or T2 T2 T3 3.6V 3.6V 3.6V 0V 3.6V 3.6V VCKA T2 T3 VCK CRT CRT1 CRT2 CRT1 CRT2 CRT1 CRT2 CRT1 CRT2 CRT1 CRT2 CRT1 CRT2 CRT1 CRT1 CRT1 Notes T1=8S T2=3S T3=20S
Symbol SW1 SW2 C A A A A BA C A A B B B A A A A A A
MITSUMI
System Reset (Built-in Watch Dog Timer) MM1099
Block Diagram
RA MM1099A MM1099B ~ 305k ~ 350k -
RB ~ 195k ~ 150k -
Note 1. Cp = approx. 0.1F Note 2. C ~ 1000pF Note 3. The watchdog timer can be stopped by grounding the RCT pin. (Function as voltage detection circuit.) Note 4. TPR, TWD can be varied by pulling up the RCT pit to VCC using a resisteor.
Timing Chart
VCC
VSH VSL 0.3V
CK
TCK
CT
RESET
TPR
TWD
TWR
TPR
1
2
345
5
67
89
10
1 12 1
MITSUMI
System Reset (Built-in Watch Dog Timer) MM1099
Description of Operation
1. The RESET will become "Low" if VCC rises to about 0.8V. Approximately 1A (Vcc=0.8V) of pull up current is output from RESET . . 2. Charging starts at the capacitor CT when VCC riset to VSH (MM1099A = 3.25V, MM1099B = 4.3V), when the . . output has been reset. 3. The output reset is released after a given interval TPR from when the CT Starts charging and to when it discharges (that is, the time from when CT voltage takes a given value 1 (. . 1.4V) up until decreases to a = given value 2 (. . 0.2V). (RESET will become "High"). The RESET will output a pull up current, about 1A = (VCC=0.8V). The reset hold time TPR is expressed by the following formula: TPR (ms) . . 5000 CT (F) = After the reset release CT restarts charging and the watch dog timer begins operating. Note that input of clock while POWER ON RESET time TPR will cause an erroneous operation. 4. If clock is input into CK terminal while CT is charging (negative edge trigger), CT changes from charging over to discharging. . 5. When the CT voltage decreases to a given threshold ( = 0.2V), then discharging changes over to charging. . Steps 4 and 5 will be repeated while normal clock is input from the logic system. 6. When the clock ceases and CT voltage reaches the RESET ON threshold (. . 1.4V), the output enters into = reset state (RESET becoming "Low"). The CT charging time TWD up until the reset is output (watch dog monitoring time) is expressed by the following formula: TWD (ms) . . 5000 CT (F) = 7. The reset time at the time of watch dog time TWR is the discharging time while the CT voltage lowers down . to the reset off threshold ( = 0.2V). The calculation formula: . TWR (ms) . . 100 CT (F) = After the reset off threshold is reached, the output reset is released and CT commences to charge. If thenceforth the clock is input normally, steps 4 and 5 will be repeated, and setps 6 and 7 repeated if the clock ceases. 8. When VCC lowers down to VSL (MM1099A . . 3.2V, MM1099B . . 4.2V), the reset is output. At the same time = = CT charged. 9. CT discharging starts when VCC rises up to VSH. If VCC lower instantaneously, charging starts after load discharging of CT if the time interval from when VCC comes lower than VSL up until when it rises to VSH or higher is equal or superior to the reference value of VCC input pulse width TPI. 10.The output reset is released TPR after VCC becomes VSH or higher, and the watch dog time will start. Then if VCC becomes VSL or lower, steps 8 to 10 will be repeated. 11.If power Off occurs, reset is output if VCC becomes VSL or lower. 12.When VCC comes down to 0V, the reset output will hold up until VCC becomes 0.8V.
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